The present invention relates to electronic devices, and, more particularly, to a method and device for reducing the current consumption of a microcontroller.
Referring to FIG. 1, a microcontroller MCU is an integrated circuit comprising various internal circuits. These internal circuits include a central processing unit CPU, a main oscillator OSC, a clock signal generating circuit MCC producing a clock signal fCPU (from a signal delivered by the main oscillator), as well as internal peripheral circuits. In the following description, the terms xe2x80x9cinternalxe2x80x9d, xe2x80x9cexternalxe2x80x9d, xe2x80x9cinsidexe2x80x9d and xe2x80x9coutsidexe2x80x9d are relative to the package of the microcontroller MCU, the latter being schematically shown in FIG. 1 by a box in broken lines.
The internal peripheral circuits, e.g., comprise an EPROM or EEPROM type memory MEM, a watchdog circuit WDG, at least one analog-to-digital converter ADC and/or at least one digital-to-analog converter DAC, counters, etc. The memory MEM is loaded by the customer with a user program at a programming stage prior to using the microcontroller in its application.
One of the desires of integrated circuit manufacturers is to reduce circuit current consumption as much as possible. Indeed, in many applications the power supply for the electronic circuit incorporating the integrated circuit is a battery or cell whose charge is limited in time. Moreover, reducing the power consumption of integrated circuits limits heat dissipation problems due to the Joule effect (Joule losses). Accordingly, the continuous development of integrated circuit technology makes it possible to reduce their power consumption. This reduction relates to the xe2x80x9cstaticxe2x80x9d consumption, in the sense that it does not depend on the operation of the integrated circuit.
On the other hand, microcontrollers are becoming increasingly complex in the sense that they incorporate an increasing number of internal circuits to meet the users"" growing needs. As a consequence, the efforts made in the technology for reducing current consumption are all too often greatly offset by the increase in size and complexity of the integrated circuits. Indeed, the consumption of a microcontroller is strongly linked to the number of transistors (elementary components) it contains, since consumption results from the switching of these transistors.
For this reason, it has long been suggested in the field of microcontrollers to deactivate the integrated circuit in the intervals during which it is not active in the application. Under such conditions, the microcontroller is sometimes referred to as being in the standby state. Similarly, it has also been suggested to deactivate only some of the microcontroller""s internal circuits when these circuits do not need to be active in the operation of the microcontroller. Both of the above measures lead to a xe2x80x9cdynamicxe2x80x9d reduction in current consumption insofar as the savings obtained depend on the use of the microcontroller.
Consequently, microcontrollers known in the art can be run in different modes in which a certain number or all of their internal circuits are deactivated. In the above two paragraphs and what follows in the present description (unless otherwise stated), the terms xe2x80x9cactivatedxe2x80x9d and xe2x80x9cdeactivatedxe2x80x9d applied in the context of an internal circuit of a microcontroller mean, respectively, that the circuit in question receives or does not receive the clock signal fCPU.
For instance, in the ST7 microcontroller family marketed by the firm STMicroelectronics S.A., the following operating modes are distinguished:
(1) a RUN or xe2x80x9cEXECUTIONxe2x80x9d mode, in which all of the microcontroller""s internal circuits are activated (FIG. 1); the RUN mode is the normal operating mode, the one in which the user program is executed; it is the default operating mode, i.e. the one in which the microcontroller is entered after its power on reset and after each subsequent reset;
(2) a xe2x80x9cSLOWxe2x80x9d operating mode, in which the frequency of the clock signal fCPU is reduced compared to its nominal value; the CPU and the microcontroller""s peripheral circuits are activated by this reduced frequency clock signal; this mode already lowers current consumption since the lower the frequency the fewer the number of transistors are switched per unit time; naturally, the microcontroller""s operating speed is correspondingly reduced;
(3) a xe2x80x9cWAITxe2x80x9d mode in which the CPU is deactivated while the internal peripheral circuits are activated; the microcontroller is set into this operating mode upon executing an adapted instruction of the user program known as a wait instruction; classically, the microcontroller is thus set into the WAIT mode during the period assigned for an operation carried out by an internal peripheral circuit (e.g. an analog-to-digital conversion executed by an ADC circuit), such an operation being independent of the CPU; the microcontroller is returned from the WAIT mode to the RUN mode by an internal interruption (generated by the aforementioned microcontroller internal peripheral circuit when that operation is terminated); this interruption allows the CPU to resume operation for executing the following instruction designated by its program counter; naturally, it is also possible to provide for the microcontroller to return from the WAIT mode to the RUN mode upon receipt of an external interrupt signal EXT_INT or an external reset signal RST on appropriate input pins of the microcontroller package; the WAIT mode decreases consumption by withdrawing the contribution of the CPU during the time periods when it is not operative;
(4) a SLOW WAIT mode, which is a combination of the two previous modes, respectively, SLOW and WAIT;
(5) a HALT mode, in which the main oscillator ceases to operate (i.e. it no longer generates a signal fOSC); accordingly, the CPU and the microcontroller internal peripheral circuits are deactivated since they no longer receive a clock signal fCPU; as with the WAIT mode, the microcontroller is set into the HALT mode by executing an appropriate instruction of the user program, known as a HALT instruction; conversely, the microcontroller is brought back from the HALT mode to the RUN mode only when the CPU receives one of the above-mentioned EXT_INT or RST signals via appropriate input pins of the microcontroller package (see FIG. 1).
Of all the above operating modes, the HALT mode is the most economical in terms of current consumption. However, it suffers the drawback of involving a risk of blocking the microcontroller. Indeed, all the internal circuits of the icrocontroller are deactivated in the HALT mode (they do not receive any clock signal since the main oscillator is inoperative). Unless an external interrupt signal or an external reset signal is generated, the microcontroller could remain blocked indefinitely in the HALT mode. It is imperative to make provisions for these external signals in the application, which provides a constraint for the user.
The WAIT mode can overcome this drawback since the clock signal fcpu is always generated in the WAIT mode and an internal interruption can always be generated to bring the microcontroller back to the RUN mode. However, since the clock signal fcpu is transmitted as an input to each microcontroller internal circuit, Joule losses occur in the set of connections provided for this transmission. This set is commonly referred to as a xe2x80x9cclock signal distribution treexe2x80x9d or more simply as a xe2x80x9cclock treexe2x80x9d and is designated by reference CLKTR in FIG. 1. In addition, this is the reason why the clock signal fcpu is generally greatly amplified in the MCC circuit which comprises several buffers (not shown) for that purpose. This is the reason why the WAIT mode, although more economical than the RUN mode, is less economical than the HALT mode.
In view of the foregoing background, it is therefore an object of the invention to overcome the above-mentioned drawbacks with microcontrollers according to the prior art.
In accordance with the invention, this object is achieved by virtue of a new microcontroller operating mode. In the following description, this mode is termed the ACTIVE-HALT mode. The broad concept of the invention includes combining the advantages of the HALT mode with those of the WAIT mode.
On the basis of this concept, there is suggested an operating mode in which the main oscillator OSC no longer operates (so providing the advantages of the HALT mode), but in which a specific internal peripheral circuit generates an internal interruption after a predetermined time period. This internal interruption allows all of the microcontroller""s internal circuits to be activated again by bringing the microcontroller back to the RUN mode. Such an internal peripheral circuit can be formed, e.g., by a counter COUNT, such as shown in FIG. 1. Naturally, it requires a specific time base to operate. The latter can be supplied from the outside by an oscillating signal or an external clock signal. It can also be generated internally by an auxiliary oscillator OSC-AUX shown in FIG. 1.
However, this auxiliary oscillator occupies additional chip area in the microcontroller, which is undesirable. This is why a microcontroller according to the invention can operate according to an ACTIVE-HALT mode which is implemented differently.
Indeed, the invention contemplates a method of reducing the consumption of a microcontroller. The microcontroller comprises a central processing unit, a main oscillator, a memory in which is stored a user program for driving the microcontroller, and at least one internal peripheral circuit and a clock tree. The method preferably comprises the steps of:
a) with the microcontroller in a run mode in which the user program is run by the central processing unit, setting the microcontroller into an active halt mode in which the central processing unit, the internal peripheral circuits and the clock tree are deactivated, but in which the main oscillator is operative and delivers an oscillating signal;
b) generating a time delay having a predetermined period, using an internal circuit activated by the oscillating signal; and
c) generating an internal interruption, after the time delay, this internal interruption bringing the microcontroller back to the run mode.
The invention also relates to a device for limiting the power consumption of a microcontroller. The microcontroller comprises a central processing unit, a main oscillator, a memory in which is stored a user program for driving the microcontroller, and at least one internal peripheral circuit and a clock tree. The device also comprises:
means for causing the microcontroller to pass from a run mode, in which the user program is run by the central processing unit, to an active halt mode, in which the central processing unit, the internal peripheral circuits and the clock tree are deactivated but in which the main oscillator is operative and delivers an oscillating signal;
time delay generating means controlled by the oscillating signal; and
means for generating an interruption bringing the microcontroller (MCU) back to the run mode, which are activated by the time delay generating means.
According to one advantage of the invention, the microcontroller is brought back from the active halt mode to the run mode by internal means. Moreover, this takes place in all cases after the time delay at the latest. This thereby avoids all risks of blocking the microcontroller in the active halt mode.
According to another advantage of the invention, the central processing unit and the internal peripheral circuits are deactivated in the active halt mode, whereupon they do not consume any current. Likewise, Joule losses in the clock tree are avoided. Moreover, the time delay means uses an oscillating signal delivered by the main oscillator so that no additional means, be it internal or external, is required to provide a time base.